Robust Filter Design for Sigma-Delta Modulators with One-Bit Quantizer and Analog Mismatch

A method for improving the signal-to-noise ratio (SNR) of single-stage sigma-delta modulators (SDMs) with one-bit quantizer is presented. It is well known that uncertainties and noises are sources of error which cause performance degradation. Specifically, the modulators are naturally subject to analog mismatch in capacitor values and finite amplifier gain, which are manifested as parametric uncertainties of the SDMs, whereas the quantization error due to the coarse quantizer is modeled as a bounded-peak additive noise. Robust stability margin optimization and suppression of the output swing of the non-ideal integrators are also considered in the integral design. Based on a frequently used linear model, we propose a new architecture for the SDMs. The associated digital filter is determined by robust control theory. For numerical illustration, comparisons between the proposed SDM and the conventional one are made. It is shown that the proposed SDM has an effective resolution of 16 bits.